1. Field of the Invention
The present invention relates generally to an apparatus for decoding a signal and, more particularly, is directed to an apparatus for decoding a signal for use with a digital video tape recorder.
2. Description of the Prior Art
The following problems are inherent in a digital magnetic recording and reproducing apparatus such as a digital video tape recorder and the like:
1. A maximal frequency of a recorded signal may be increased so high that the recorded signal cannot be read.
2. Direct current components and low frequency components frequently may appear in the recorded signal causing distortion to occur in the reproduced signal when a digital signal is recorded and reproduced by utilizing a rotary transformer. As a result, the reproduced information frequently is considerably different from the recorded information.
3. When digital data is recorded, data series is generally recorded together with a clock component according to a self-clock system. If a digital "1" or "0" is recorded too contiguously, then the error rate in extracting the clock component at the playback side is increased.
In order to solve the above-mentioned problems, a digital magnetic recording and reproducing apparatus has been arranged in accordance with a prior art system described below so as to record and reproduce a digital data signal.
According to such a digital magnetic recording and reproducing apparatus, upon recording, a digital input signal is converted to a recording signal having a predetermined frequency characteristic by a channel coding (recording and encoding) circuit. Then, this recording signal is recorded on a magnetic record medium by a recording head. Upon playback, a signal reproduced from the magnetic record medium by a playback head is supplied to and is reproduced by a decoder whose converting characteristic is opposite to that of the channel coding circuit. The channel coding system may be the Nonreturn to Zero-Inverted (NRZ-I) system, the Interleaved NRZ-I (I-NRZ-I) system or the Scrambled I-NRZ-I (S-I-NRZ-I) system based on a partial response system (PR system) which makes effective use of intersymbol interference in the digital recording.
According to the NRZ-I system, an NRZ signal of binary code form is converted to an NRZ-I recording signal. The encoder which converts the input signal to the recording signal just before the transmission line typically is called a precoder. The NRZ-I system precoder is called a PR (1, -1) encoder because it effects the coding of the conversion opposite the conversion of the PR (1, -1) transmission line based on the partial response system. The NRZ-I system, however, has the disadvantage of a direct current component which frequently increases when the input signal is not inverted.
According to the I-NRZ-I system, an NRZ signal is converted to an I-NRZ-I recording signal. The I-NRZ-I system precoder performs the conversion in reverse to conversion in a PR (1, 0, -1) transmission line based on a class IV partial response. The precoder is called a PR (1, 0, -1) encoder or a class IV partial response encoder.
An identifying signal, which results from recording and reproducing the I-NRZ-I recording signal, has frequency characteristics similar to those of the magnetic recording and reproducing systems. As a result, the identifying signal contains fewer high frequency components and no direct current (DC) components. Further, the identifying signal cannot be affected by the cross-talk component caused by the increased wavelength of the recording signal, nor by the rotary transformer of the head system.
Although the identifying signal reproduced according to the I-NRZ-I system does not contain direct current components, the recording signal of such system does contain direct current components. In order to reduce the direct current component of the recording signal, the S-I-NRZ-I system has been used. According to the S-I-NRZ-I system, by adding the M series signal (represented in the form of binary random number) to the input signal in mod. 2 (or to scramble the input signal by the M series signal), it is possible to reduce the direct current components.
FIG. 1 is referring to FIG. 1 a block diagram showing an arrangement of a prior-art digital video tape recorder using the above-mentioned channel coding circuit of the S-I-NRZ-I system is shown in which an analog video signal is supplied to an input terminal 1. This analog video signal is supplied to an analog-to-digital (A/D) converter 2, for conversion to a digitized data signal. The digitized data signal is supplied through a bit reduction encoder 3 to an error correction code (ECC) encoder 4, in which it is encoded to have a parity code for use during error-correction. The data signal having the parity code is supplied to an M scramble circuit 5 and is thereby converted, for example, to a signal having no direct current (DC) components which correspond to a characteristic of a head-tape system to be described later. The scramble circuit 5 utilizes a so-called M series signal as a pseudorandom signal and hence is called the M scramble circuit. The signal thus converted is supplied to an adder 6, whereby it is added with a synchronizing (SYNC) code from a terminal 7.
The signal having the synchronizing code added is supplied to an adder 8, with the output signal of the adder 8 fed through delay elements 9a and 9b and back to the adder 8. Each of the delay elements 9a and 9b has a sampling cycle D. The adder 8 and the delay elements 9a and 9b constitute a class IV partial response (PR) (1, 0, -1) precoder shown by a broken line block in FIG. 1, thereby effecting the processing of [1/1-D.sup.2 ] according to the class IV partial response system.
The output signal from the adder 8 is supplied through a recording amplifier 10 to a recording head 11, and thereby, is recorded on a tape 12.
The recorded signal is reproduced from the tape 12 by means of a playback head 13 and a playback amplifier 14.
The electromagnetic transducing system formed of the recording head 11, the tape 12 and the playback head 13 has a characteristic of [1-D].
The signal from the playback amplifier 14 is supplied through an equalizer 15 to an adder 16, and the signal from the equalizer 15 is supplied through a delay element 17 having a sampling cycle D to the adder 16. The adder 16 and the delay element 17 constitute a class IV partial response (PR) (1, 1) decoder as shown by a broken line block in FIG. 1. Accordingly, when the characteristic [1-D] of the electromagnetic transducing system, formed by the recording head 11, the tape 12 and the playback head 13, is combined with the characteristic [1.times.D] of the class IV PR (1, 1) decoder, formed of the adder 16 and the delay element 17, there is presented the characteristic [1-D.sup.2 ]. This characteristic [1-D.sup.2 ] is complemetary to the characteristic [1/(1-D.sup.2)] of the above-mentioned class IV PR (1, 0, -1) predecoder. Accordingly, the following equation is established. EQU 1/(1-D.sup.2).times.(1-D).times.(1+D)=1
Thus, the transmission with transfer function "1" is carried out, and a ternary signal (1, 0, -1) of class IV partial response system is generated.
This ternary signal is supplied to a ternary signal comparator 18 from which there is decoded a signal which is not yet precoded in the recording mode. The thus decoded signal is supplied through an M descramble circuit 19 to a time base corrector 20, in which it is timebase-corrected. The signal from the time base corrector 20 is supplied through an error correction code decoder 21 and a bit reduction decoder 22 to a digital-to-analog (D/A) converter 23, in which it is converted to an analog video signal. This analog video signal is supplied to an output terminal 24.
The signal from the ternary signal comparator 18 is supplied to a synchronizing (SYNC) code detecting circuit 25, and the synchronizing code detected is supplied to a terminal 26.
In the circuit system formed of the circuit elements from the A/D converter 2 to the D/A converter 23 of the prior-art digital video tape recorder, a video signal is processed in a digital fashion in the recording system from the A/D converter 2 to the class IV PR (1, 0, -1) precoder, whereas a video signal is processed in an analog fashion in the reproducing system from the playback head 13 to the ternary comparator 18. A video signal is therefore processed in a digital fashion by a circuit system from the M descramble circuit 19 to the D/A converter 23.
The equalizer 15, the adder 16 and the delay element form the decoder system which processes the video signal in an analog fashion. In the analog data processing, it is frequently observed that errors occur in the data signal due to temperature characteristics and aging changes.
Further, the delay element 17 forming the class IV partial response (1, 1) decoder is formed of an analog delay line so that the delay time of the delay element 17 cannot be varied without difficulty. As a result, when the transmission rate is changed upon cue or in review playback mode, it is difficult to vary the sampling frequency in accordance with the varied transmission rate.
In order to solve the above-mentioned problems, it is proposed that the output signal from the playback amplifier 14 be converted from analog form to digital form so that the circuit elements from the equalizer 15 to the ternary signal comparator 18 perform the processing in a digital fashion. According to sampling the digital processing generally requires a sampling frequency twice as high as the transmission rate of a transmission signal from a sampling theorem standpoint. The digital video tape recorder or the like, in particular, requires a very high sampling frequency, which cannot be realized in practice.